基本信息

書名：微電子學導論(英文版)

定價：69.00元

作者：趙策洲,方舟,陸騏峰

齣版社：科學齣版社

齣版日期：2014-01-01

ISBN：9787030397751

字數：

頁碼：

版次：1

裝幀：平裝

開本：16開

商品重量：0.4kg

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內容提要

《微電子學導論（英文版）》講述瞭半導體材料、半導體器件、微電子工藝及製造、以及IC設計等的基礎和基本知識。《微電子學導論（英文版）》力圖以比較淺顯易懂的方式來介紹半導體物理和器件的基礎知識，介紹瞭微電子製造的基本工藝知識和半導體器件，如IC電阻、二極管、MOSFETs和雙極晶體管的工藝流程，也介紹瞭簡單MOS數字集成電路和模擬集成電路的概論、電路分析和版圖設計。

目錄

PrefaceChapter 1 Introduction 1.1 History of semiconductor devices and ICs 1.2 Moore's Law--transistor scaling 1.3 Die yield and die cost ReferencesChapter 2 Semiconductor material fundamentals 2.1 Atomic structures 2.1.1 Elements and element periodic table 2.1.2 Bohr's theory--orbits 2.1.3 Distribution of electrons--valence electrons 2.1.4 Chemical bonds 2.2 Crystal structures 2.2.1 General material structures 2.2.2 Crystallography--diamond structure and zinc blende structure 2.2.3 Crystallographic notation 2.2.4 Bohr's theory--energy level and energy band 2.3 Energy band theory 2.3.1 Insulator, semiconductor and conductor 2.3.2 Electrons and holes 2.3.3 Generation and rebination 2.4 Doping of semiconductors 2.4.1 Doping elements 2.4.2 Doping: n-type 2.4.3 Doping: p-type 2.4.4 Counter doping 2.5 Carriers distribution 2.5.1 Fermi function and Fermi level 2.5.2 Density of states 2.5.3 Electron and hole concentrations 2.6 Carrier drift and diffusion 2.6.1 Carrier scattering 2.6.2 Carrier drift--drift currents and mobility 2.6.3 Electric field and energy band bending 2.6.4 Carrier diffusion--diffusion currents and Einstein relation ReferencesChapter 3 Semiconductor device fundamentals 3.1 PN junction 3.1.1 Formation of depletion region 3.1.2 Built-in potential 3.1.3 Distribution of electric field and electric potential 3.1.4 Effect of applied voltage 3.1.5 Depletion capacitance 3.2 Metal-semiconductor contacts and MOS capacitors 3.2.1 Schottky diode and Ohmic contact 3.2.2 MOS capacitance and measurement 3.2.3 MOS energy band diagram 3.2.4 Capacitance--voltage characteristics 3.3 MOSFETs 3.3.1 Current--voltage characteristics 3.3.2 Types and circuit symbols of MOSFETs 3.3.3 Switch model of MOSFETs 3.4 Bipolar junction transistors 3.4.1 PN junction--a brief review 3.4.2 BJT structure and circuit symbols 3.4.3 NPN BJT operation--a qualitative analysis 3.4.4 NPN BJT operation--a quantitative analysis ReferencesChapter 4 Semiconductor fabrication fundamentals 4.1 IC fabrication techniques 4.1.1 Thin film formation 4.1.2 Photolithography and etching 4.1.3 Doping 4.2 IC resistor and diode process 4.2.1 IC resistor--masks and process steps 4.2.2 Design rules 4.2.3 Sheet resistance 4.2.4 Layout design of an IC resistor 4.2.5 Diode--masks and process steps 4.3 MOSFET process 4.3.1 NMOSFET process flow and layout 4.3.2 Local oxidation of silicon 4.3.3 CMOS n well process flow 4.4 BJT process 4.4.1 BJT process steps 4.4.2 Layout of an NPN BJT IC ReferencesChapter 5 Integrated circuits--concepts and design 5.1 NMOS digital circuits 5.1.1 NMOS digital circuits analysis--logic and calculation 5.1.2 MOSIS design rules for NMOS ICs 5.1.3 Layouts of NMOS logic families 5.2 CMOS digital circuits 5.2.1 CMOS digital circuits analysis 5.2.2 MOSIS design rules for CMOS ICs 5.2.3 MOS transistors in series/parallel connection 5.2.4 CMOS inverter, NOR gates and NAND gates 5.2.5 Ratioed logic and binational equivalent circuit 5.2.6 Dynamic circuits 5.3 MOS analog circuits 5.3.1 MOSFET active resistors and potential dividers 5.3.2 MOSFET mon-source stages 5.3.3 CMOS push-pull amplifiers 5.3.4 MOSFET current mirrors 5.3.5 MOSFET differential amplifiers ReferencesAppendix I Properties of semiconductor materialsAppendix II Symbols and constantAppendix III L-Edit Quick Guide

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