基本信息

書名：計算機組織與結構——性能設計(第七版 影印版)

定價：55.00元

作者：(美)斯長林

齣版社：高等教育齣版社

齣版日期：2009-11-01

ISBN：9787040282542

字數：

頁碼：

版次：1

裝幀：平裝

開本：大16開

商品重量：1.081kg

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內容提要

本書介紹計算機的結構和功能，旨在盡量清晰、完整地介紹現代計算機係統的本質和特性。
盡管計算機領域存在著産品的多樣性以及變革迅速的特點，但一些基本的概念依然適用。這些概念的應用取決於技術的當前發展狀況以及設計者希望實現的價格／性能目標。本書的目的是詳細討論計算機組織與結構的基本原理，並將這些基本原理與目前的設計問題關聯起來。

目錄

Web Site for the Book
Preface
PART ONE OVERVIEW
　Chapter 1 Introduction
　1.1 Organization and Architecture
　 1.2 Structure and Function
　 1.3 Why Study Computer Organization and Architecture
　Chapter 2 Computer Evolution and Performance
　 2.1 A Brief History of Computers
　 2.2 Designing for Performance
　 2.3 Pentium and PowerPC Evolution
　 2.4 Remended Reading
　 2.5 Key Terms, Review Questions, and Problems
PART TWO THE PUTER SYSTEM
　Chapter 3 A Top-Level View of Computer Function and Interconnection
　 3.1 Computer Components
　 3.2 Computer Function
　 3.3 lnterconnection Structures
　 3.4 Bus Interconnection
　 3.5 PCI
　3.6 Remended Reading
　　3.7 Key Terms, Review Questions, and Problems
　 Appendix 3A Timing Diagrams
　Chapter 4 Cache Memory
　 4.1 Computer Memory System Overview
　 4.2 Cache Memory Principles
　 4.3 Elements of Cache Design
　 4.4 Pentium 4 and PowerPC Cache Organizations
　 4.5 Remended Reading
　 4.6 KeyTerms, Review Questions, and Problems
　 Appendix 4A Performance Characteristics of Two-Level Memories
　Chapter 5 Internal Memory
　 5.1 Semiconductor Main Memory
　 5.2 Error Correction
　 5.3 Advanced DRAM Organization
　 5.4 Remended Reading
　 5.5 Key Terms, Review Questions, and Problems
　Chapter 6 External Memory
　 6.1 Magic Disk
　 6.2 RAID
　 6.3 Optical Memory
　 6.4 Magic Tape
　 6.5 Remended Reading
　6.6 Key Terms, Review Questions, and Problems
　Chapter 7 Input/Output
　 7.1 External Devices
　 7.2 I/O Modules
　 7.3 Programmed I/O
　 7.4 Interrupt-Driven I/O
　 7.5 Direct Memory Access
　 7.6 I/O Channels and Processors
　 7.7 The External Interface: FireWire and InfiniBand
　 7.8 Remended Reading
　 7.9 Key Terms, Review Questions, and Problems
　Chapter 8 Operating System Support
　 8.1 Operating System Overview
　 8.2 Scheduling
　 8.3 Memory Management
　8.4 Pentium II and PowerPC Memory Management
　 8.5 Remended Reading
　 8.6 Key Terms, Review Questions, and Problems
PART THREE THE CENTRAL PROCESSING UNIT
　Chapter 9 Computer Arithmetic
　 9.1 The Arithmetic and Logic Unit
　 9.2 Integer Representation
　9.3 Integer Arithmetic
　 9.4 Floating-Point Representation
　 9.5 Floating-Point Arithmetic
　 9.6 Remended Reading
　 9.7 Key Terms, Review Questions, and Problems
　Chapter 10 Instruction Sets: Characteristics and Functions
　10.1 Machine Instruction Characteristics
　 10.2 Types of Operands
　 10.3 Pentium and PowerPC Data Types
　 10.4 Types of Operations
　 10.5 Pentium and PowerPC Operation Types
　 10.6 Assembly Language
　 10.7 Remended Reading
　 10.8 Key Terms, Review Questions, and Problems
　 Appendix 10A Stacks
　Appendix 10B Little-, Big-, and Bi-Endian
　Chapter 11 Instruction Sets: Addressing Modes and Formats
　Chapter 12 Processor Structure and Function
　Chapter 13 Reduced Instruction Set Computers
　Chapter 14 Instruction-Level Parallelism and Superscalar Processors
　Chapter 15 The IA-64 Architecture
PART FOUR THE CONTROL UNIT
　Chapter 16 Control Unit Operation
　Chapter 17 Microprogrammed Control
PART FIVE PARALLEL ORGANIZATION
　Chapter 18 Parallel Processing
Appendix A Number Systems
Appendix B Digital Logic
Appendix C Projects for Teaching Computer Organization and Architecture
Glossary
References
Index

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